![]() ![]() This allows access to all the custom features within a specific processor, and must support a minimum set of commands. The basic building block of a JTAG OCD is the Test Access Point or TAP controller. To help a user migrate to IA32, this white paper gives a quick overview of the various implementations, and names, of JTAG debug methods for users familiar with PowerPC, ARM and MIPS processors and this is compared to the JTAG implementation in the Intel® Atom™ Microprocessor. ![]() Not content with JTAG or IEE1149.1 as a name for this feature, most semiconductor vendors have also declared their own brand name version. This paper deals with using the Test Access Port (TAP) as a means to control the execution of the processor, and to debug software via the TAP. If you examine the standard's title you may be able to deduce the two use cases for JTAG devices and hardware. IEEE Std 1149.1-1990 IEEE Standard Test Access Port and Boundary-Scan Architecture is the official name, but JTAG is a bit snappier and is an abbreviation of Joint Test Action Group. JTAG (jay-tag) is one of the engineering acronyms that has been transformed into a noun, although arguably it is not so popular as RAM, or CPU. ![]()
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